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FDB10AN06A0 データシートの表示(PDF) - Fairchild Semiconductor

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FDB10AN06A0
Fairchild
Fairchild Semiconductor Fairchild
FDB10AN06A0 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
PSPICE Electrical Model
.SUBCKT FDP10AN06A0 2 1 3 ; rev July 2002
Ca 12 8 7e-10
Cb 15 14 7e-10
Cin 6 8 1.8e-9
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
Ebreak 11 7 17 18 68.4
DPLCAP 5
10
RSLC2
RSLC1
51
5
51
ESLC
DBREAK
11
LDRAIN
DRAIN
2
RLDRAIN
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
Evtemp 20 6 18 22 1
It 8 17 1
Lgate 1 9 7e-9
Ldrain 2 5 1.0e-9
Lsource 3 7 3e-9
RLgate 1 9 70
RLdrain 2 5 10
RLsource 3 7 30
GATE
1
LGATE
RLGATE
-
ESG
6
8
+
EVTHRES
EVTEMP
+ 19 -
8
RGATE + 18 - 6
9
20 22
CIN
S1A
12 13
8
S2A
14
15
13
50
RDRAIN
16
21
+
17
EBREAK 18
-
MWEAK
DBODY
MMED
MSTRO
8
7
RSOURCE
LSOURCE
SOURCE
3
RLSOURCE
RBREAK
17
18
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 1.6e-3
Rgate 9 20 3.6
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
Rsource 8 7 RsourceMOD 6e-3
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
S1B
S2B
CA
13
CB
+
+ 14
EGS
6
8
-
EDS
5
8
-
RVTEMP
19
IT
-
VBAT
+
8
22
RVTHRES
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*250),7))}
.MODEL DbodyMOD D (IS=9E-12 N=1.06 RS=2.7e-3 TRS1=2.4e-3 TRS2=1.1e-6
+ CJO=1.25e-9 M=5.3e-1 TT=4e-9 XTI=3.9)
.MODEL DbreakMOD D (RS=2.7e-1 TRS1=1e-3 TRS2=-8.9e-6)
.MODEL DplcapMOD D (CJO=4.7e-10 IS=1e-30 N=10 M=0.44)
.MODEL MmedMOD NMOS (VTO=3.6 KP=5.5 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=3.6)
.MODEL MstroMOD NMOS (VTO=4.4 KP=80 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MweakMOD NMOS (VTO=3.06 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=36 RS=0.1)
.MODEL RbreakMOD RES (TC1=9e-4 TC2=5e-7)
.MODEL RdrainMOD RES (TC1=2.5e-2 TC2=7.8e-5)
.MODEL RSLCMOD RES (TC1=1e-3 TC2=3.5e-5)
.MODEL RsourceMOD RES (TC1=1e-3 TC2=1e-6)
.MODEL RvthresMOD RES (TC1=-5.9e-3 TC2=-1.3e-5)
.MODEL RvtempMOD RES (TC1=-2.3e-3 TC2=1.3e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-8 VOFF=-5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-5 VOFF=-8)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2 VOFF=-1.5)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.5 VOFF=-2)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
©2002 Fairchild Semiconductor Corporation
FDB10AN06A0 / FDP10AN06A0 Rev. A

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