M58CR032C100ZB6T データシートの表示（PDF） - STMicroelectronics

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M58CR032C100ZB6T

32 Mbit (2Mb x 16, Dual Bank, Burst ) 1.8V Supply Flash Memory

STMicroelectronics 

M58CR032C, M58CR032D

be asserted only once during a continuous burst

access. See also Table 5, Burst Type Definition.

M14, M9, M5 and M4 are reserved for future use.

Table 4. Burst Configuration Register

Bit

Description

Value

Description

M15

Read Select

0

Synchronous Burst Read

1

Asynchronous Page Read (Default at power-on)

M14

Reserved

010

2 clock latency

011

3 clock latency

M13-M11

X-Latency (2)

100

4 clock latency

101

5 clock latency

111

Reserved

Other configurations reserved

M10

0

Power-Down (3)

1

Power-Down disabled

Power-Down enabled

M9

Reserved

M8

Wait

0

WAIT is active during wait state

1

WAIT is active one data cycle before wait state (default)

M7

Burst Type

0

Interleaved

1

Sequential (default)

0

M6

Valid Clock Edge

1

Falling Burst Clock edge

Rising Burst Clock edge

M5-M4

Reserved

M3

Wrapping

0

Wrap

1

No wrap

001

4 words

M2-M0

Burst Length

010

8 words

111

Continuous (M7 must be set to ‘1’)

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