M58CR032C100ZB6T データシートの表示（PDF） - STMicroelectronics

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M58CR032C100ZB6T

32 Mbit (2Mb x 16, Dual Bank, Burst ) 1.8V Supply Flash Memory

STMicroelectronics 

M58CR032C, M58CR032D

Read operations in the bank being programmed

output the Status Register content after the pro-

gramming has started.

During Double Word Program operations the bank

being programmed will only accept the Read Sta-

tus Register command and the Program/Erase

Suspend command. Typical Program times are

given in Table 12, Program, Erase Times and Pro-

gram/Erase Endurance Cycles.

Programming aborts if Reset goes to VIL. As data

integrity cannot be guaranteed when the program

operation is aborted, the block containing the

memory location must be erased and repro-

grammed.

See Appendix B, Figure 19, Double Word Program

Flowchart and Pseudo Code, for the flowchart for

using the Double Word Program command.

Quadruple Word Program Command

This feature is offered to improve the programming

throughput, writing a page of four adjacent words

in parallel. The four words must differ only for the

addresses A0 and A1. The first write cycle must be

addressed to the bank to be programmed.

Only one bank can be programmed at any one

time. The other bank must be in Read mode or

Erase Suspend.

Programming should not be attempted when VPP

is not at VPPH. The command can be executed if

VPP is below VPPH but the result is not guaranteed.

Five bus write cycles are necessary to issue the

Quadruple Word Program command.

s The first bus cycle sets up the Double Word

Program Command.

s The second bus cycle latches the Address and

the Data of the first word to be written.

s The third bus cycle latches the Address and the

Data of the second word to be written.

s The fourth bus cycle latches the Address and

the Data of the third word to be written.

s The fifth bus cycle latches the Address and the

Data of the fourth word to be written and starts

the Program/Erase Controller.

Read operations to the bank being programmed

output the Status Register content after the pro-

gramming has started.

Programming aborts if Reset goes to VIL. As data

integrity cannot be guaranteed when the program

operation is aborted, the block containing the

memory location must be erased and repro-

grammed.

During Quadruple Word Program operations the

bank being programmed will only accept the Read

Status Register command and the Program/Erase

Suspend command. Typical Program times are

given in Table 12, Program, Erase Times and Pro-

gram/Erase Endurance Cycles.

See Appendix B, Figure 20, Quadruple Word Pro-

gram Flowchart and Pseudo Code, for the flow-

chart for using the Quadruple Word Program

command.

Program/Erase Suspend Command

The Program/Erase Suspend command is used to

pause a Program or Erase operation. One bus

write cycle is required to issue the Program/Erase

command and pause the Program/Erase control-

ler. The command must be addressed to the bank

containing the program or erase operation.

During Program/Erase Suspend the Command In-

terface will accept the Program/Erase Resume,

Read, Read Status Register, Read Electronic Sig-

nature and Read CFI Query commands. Addition-

ally, if the suspend operation was Erase then the

Program, Block Lock, Block Lock-Down or Protec-

tion Program commands will also be accepted.

The block being erased may be protected by issu-

ing the Block Lock, Block Lock-Down or Protection

Program commands. Only the blocks not being

erased may be read or programmed correctly.

When the Program/Erase Resume command is is-

sued the operation will complete.

During a Program/Erase Suspend, the device can

be placed in a pseudo-standby mode by taking

Chip Enable to VIH. Program/Erase is aborted if

Reset turns to VIL.

See Appendix B, Figure 21, Program Suspend &

Resume Flowchart and Pseudo Code, and Figure

23, Erase Suspend & Resume Flowchart and

Pseudo Code for flowcharts for using the Program/

Erase Suspend command.

Program/Erase Resume Command

The Program/Erase Resume command can be

used to restart the Program/Erase Controller after

a Program/Erase Suspend command has paused

it. One Bus Write cycle is required to issue the

command. The command must be addressed to

the bank containing the program or erase opera-

tion. Once the command is issued subsequent

Bus Read operations read the Status Register.

If a Program command is issued during a Block

Erase Suspend, then the erase cannot be re-

sumed until the programming operation has com-

pleted. It is possible to accumulate suspend

operations. For example: suspend an erase oper-

ation, start a programming operation, suspend the

programming operation then read the array. See

Appendix B, Figure 21, Program Suspend & Re-

sume Flowchart and Pseudo Code, and Figure 23,

Erase Suspend & Resume Flowchart and Pseudo

Code for flowcharts for using the Program/Erase

Resume command.

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