CAPACITANCE (Note 1)
Parameter
Symbol
CIN
COUT
Parameter Description
Input Capacitance
Output Capacitance
Test Conditions
VIN = 2.0 V VCC = 5.0 V, TA = 25°C
VOUT = 2.0 V f = 1 MHz
Typ Unit
6
pF
8
pF
SWITCHING CHARACTERISTICS over INDUSTRIAL operating ranges (Note 2)
Parameter
Symbol
Parameter Description
-18
Min Max
-24
Min Max
tPD
Input, I/O, or Feedback to Combinatorial Output (Note 3)
18
24
D-type
12
16
tS
Setup Time from Input, I/O, or Feedback to Clock
T-type
13.5
17
tH
Register Data Hold Time
tCO
Clock to Output (Note 3)
tWL
Clock
tWH
Width
LOW
HIGH
0
0
12
14.5
7.5
10
7.5
10
D-type
40
32
External Feedback
1/(tS + tCO)
T-type
38
30.5
fMAX
tSL
tHL
tGO
tGWL
tPDL
Maximum
Frequency
(Note 1)
Internal Feedback (fCNT)
No Feedback
1/(tWL + tWH)
D-type
T-type
Setup Time from Input, I/O, or Feedback to Gate
Latch Data Hold Time
Gate to Output (Note 3)
Gate Width LOW
Input, I/O, or Feedback to Output Through Transparent
Input or Output Latch
53
38
44
34.5
66.5
50
12
16
0
0
13.5
14.5
7.5
10
20.5
26.5
tSIR
Input Register Setup Time
tHIR
Input Register Hold Time
tICO
Input Register Clock to Combinatorial Output
tICS
Input Register Clock to Output Register Setup
2.5
2.5
3.5
4
22
28
D-type
18
24
T-type
19.5
25.5
tWICL
tWICH
Input Register
Clock Width
LOW
7.5
10
HIGH
7.5
10
fMAXIR
Maximum Input Register Frequency 1/(tWICL+ tWICH)
66.5
50
tSIL
tHIL
tIGO
tIGOL
Input Latch Setup Time
Input Latch Hold Time
Input Latch Gate to Combinatorial Output
Input Latch Gate to Output Through Transparent
Output Latch
2.5
2.5
3.5
4
24
30
26.5
32.5
tSLL
Setup Time from Input, I/O, or Feedback Through
Transparent Input Latch to Output Latch Gate
14.5
18
tIGS
tWIGL
tPDLL
Input Latch Gate to Output Latch Setup
Input Latch Gate Width LOW
Input, I/O, or Feedback to Output Through Transparent
Input and Output Latches
19.5
25.5
7.5
10
23
29
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
MACH230-18/24 (Ind)
15