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MACH4-96 データシートの表示(PDF) - Lattice Semiconductor

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MACH4-96
Lattice
Lattice Semiconductor Lattice
MACH4-96 Datasheet PDF : 33 Pages
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VANTIS
The M4-96/96 has macrocells that can be configured as synchronous or asynchronous. This allows
designers to implement both synchronous and asynchronous logic together on the same device.
The two types of design can be mixed in any proportion, since the selection on each macrocell
affects only that macrocell.
Up to 20 product terms per macrocell can be assigned. It is possible to allocate some product terms
away from a macrocell without losing the use of that macrocell for logic generation.
The M4-96 macrocell provides either registered or combinatorial outputs with programmable
polarity. If a registered configuration is chosen, the register can be configured as D-type, T-type, J-
K, or S-R to help reduce the number of product terms used. The flip-flop can also be configured as
a latch. The register type decision can be made by the designer using software.
All macrocells can be connected to an I/O cell through the output switch matrix. The output switch
matrix makes it possible to make significant design changes while minimizing the risk of pinout
changes.
Vantis offers software design support for MACH devices through its own development system and
device fitters integrated into third-party CAE tools. Platform support extends across PCs, Sun and
HP workstations under advanced operating systems such as Windows 3.1, Windows 95 and NT,
SunOS and Solaris, and HPUX.
MACHXL® software is a complete development system for the PC, supporting Vantis’ MACH
devices. It supports design entry with Boolean and behavioral syntax, state machine syntax and
truth tables. Functional simulation and static timing analysis are also included in this easy-to-use
system. This development system includes high-performance device fitters for all MACH devices.
The same fitter technology included in MACHXL software is seamlessly incorporated into third-
party tools from leading CAE vendors such as Synario, Viewlogic, Mentor Graphics, Cadence and
MINC. Interface kits and MACHXL configurations are also available to support design entry and
verification with other leading vendors such as Synopsys, Exemplar, OrCAD, Synplicity and Model
Technology. These MACHXL configurations and interfaces accept EDIF 2.0.0 netlists, generate
JEDEC files for MACH devices, and create industry-standard SDF, VITAL-compliant VHDL and
Verilog output files for design simulation.
Vantis offers in-system programming support for MACH devices through its MACHPRO® software
enabling MACH device programmability through JTAG compliant ports and easy-to-use PC
interface. Additionally, MACHPRO generated vectors work seamlessly with HP3070, GenRad and
Teradyne testers to program MACH devices or test them for connectivity.
All MACH devices are supported by industry standard programmers available from a number of
vendors. These programmer vendors include Advin Systems, BP Microsystems, Data I/O
Corporation, Hi-Lo Systems, SMS GmbH, Stag House, and System General.
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MACH4-96/96-15

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