56F8165(2007) データシートの表示（PDF） - Freescale Semiconductor
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56F8165 Datasheet PDF : 172 Pages
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Signal Pins
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
MOSI0
126
(GPIOE5)
Input/
Output
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
SPI 0 Master Out/Slave In — This serial data pin is an output
from a master device and an input to a slave device. The master
device places data on the MOSI line a half-cycle before the clock
edge the slave device uses to latch the data.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is MOSI0.
MISO0
To deactivate the internal pull-up resistor, clear bit 5 in the
GPIOE_PUR register.
125
Input/
Input,
SPI 0 Master In/Slave Out — This serial data pin is an input to a
Output
pull-up master device and an output from a slave device. The MISO line
enabled of a slave device is placed in the high-impedance state if the slave
device is not selected. The slave device places data on the MISO
line a half-cycle before the clock edge the master device uses to
latch the data.
(GPIOE6)
Input/
Output
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is MISO0.
To deactivate the internal pull-up resistor, clear bit 6 in the
GPIOE_PUR register.
SS0
123
(GPIOE7)
Input
Input/
Output
Input,
pull-up
enabled
SPI 0 Slave Select — SS0 is used in slave mode to indicate to
the SPI module that the current transfer is to be received.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SS0.
To deactivate the internal pull-up resistor, clear bit 7 in the
GPIOE_PUR register.
56F8365 Technical Data, Rev. 7
Freescale Semiconductor
27
Preliminary
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