MCF5275LCVM133 データシートの表示（PDF） - Freescale Semiconductor

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MCF5275LCVM133

Integrated Microprocessor Family Hardware Specification

Freescale Semiconductor 

Preliminary Electrical Characteristics

4 The actual VOH and VOL values for SSTL pads are dependent on the termination and drive strength used. The specifications

numbers assume no parallel termination.

5 Refer to the MCF5274 signals chapter for pins having weak internal pull-up devices.

6 This parameter is characterized before qualification rather than 100% tested.

7 pF load ratings are based on DC loading and are provided as an indication of driver strength. High speed interfaces

require transmission line analysis to determine proper drive strength and termination.

8 Current measured at maximum system clock frequency, all modules active, and default drive strength with matching load.

9 All functional non-supply pins are internally clamped to VSS and their respective VDD.

10 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,

calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.

11 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current

conditions. If positive injection current (Vin > VDD) is greater than IDD, the injection current may flow out of VDD and could

result in external power supply going out of regulation. Insure external VDD load will shunt current greater than maximum

injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is

present, or if clock rate is very low which would reduce overall power consumption. Also, at power-up, system clock is not

present during the power-up sequence until the PLL has attained lock.

8.5 Oscillator and Phase Lock Loop (PLLMRFM) Electrical

Specifications

Table 11. PLL Electrical Specifications1

Characteristic

PLL Reference Frequency Range

Crystal reference

External reference

1:1 Mode (NOTE: fsys/2 = 2 × fref_1:1)

Core frequency

CLKOUT Frequency 2

External reference

On-Chip PLL Frequency

Loss of Reference Frequency 3, 5

Self Clocked Mode Frequency 4, 5

Crystal Start-up Time 5, 6

EXTAL Input High Voltage

Crystal Mode

All other modes (Dual Controller (1:1), Bypass, External)

EXTAL Input Low Voltage

Crystal Mode

All other modes (Dual Controller (1:1), Bypass, External)

XTAL Output High Voltage

IOH = 1.0 mA

XTAL Output Low Voltage

IOL = 1.0 mA

XTAL Load Capacitance7

PLL Lock Time 8

Power-up To Lock Time 6, 9

With Crystal Reference

Without Crystal Reference10

Symbol

fref_crystal

fref_ext

fref_1:1

fcore

fsys/2

fLOR

fSCM

tcst

VIHEXT

VIHEXT

VILEXT

VILEXT

VOH

VOL

tlpll

tlplk

Min

8

8

24

0

fref / 32

100

TBD

—

TBD

TBD

TBD

TBD

TBD

—

5

—

—

—

Max

25

25

83

166

83

83

1000

TBD

10

TBD

TBD

TBD

TBD

—

TBD

30

750

11

750

Unit

MHz

MHz

MHz

MHz

kHz

MHz

ms

V

V

V

V

pF

µs

ms

µs

MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2

22

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

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