MCF5275LCVM133 データシートの表示（PDF） - Freescale Semiconductor

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MCF5275LCVM133

Integrated Microprocessor Family Hardware Specification

Freescale Semiconductor 

Preliminary Electrical Characteristics

Table 12. Processor Bus Input Timing Specifications

Name

Characteristic1

Symbol Min Max Unit

B0

CLKOUT

Control Inputs

B1a Control input valid to CLKOUT high2

B1b BKPT valid to CLKOUT high3

B2a CLKOUT high to control inputs invalid2

B2b CLKOUT high to asynchronous control input BKPT invalid3

Data Inputs

tCYC

12

— ns

tCVCH

9

— ns

tBKVCH

9

— ns

tCHCII

0

— ns

tBKNCH

0

— ns

B4

Data input (D[31:16]) valid to CLKOUT high

tDIVCH

4

— ns

B5

CLKOUT high to data input (D[31:16]) invalid

tCHDII

0

— ns

1 Timing specifications have been indicated taking into account the full drive strength for the pads.

2 TEA and TA pins are being referred to as control inputs.

3 Refer to figure A-19.

Timings listed in Table 12 are shown in Figure 7.

* The timings are also valid for inputs sampled on the negative clock edge.

CLKOUT (83MHz)

TSETUP

THOLD

Input Setup And Hold

Invalid

Valid

Invalid

Input Rise Time

CLKOUT

Input Fall Time

B4

Vh = VIH

Vl = VIL

Vh = VIH

Vl = VIL

trise

tfall

B5

Inputs

Figure 7. General Input Timing Requirements

MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2

24

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

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