NC33395T データシートの表示（PDF） - Motorola => Freescale

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NC33395T

Three-Phase Gate Driver IC

Motorola => Freescale 

Freescale Semiconductor, Inc.

Note that the drivers are disabled during an overtemperature

or overvoltage fault. A flip-flop keeps the drive off until the

following PWM cycle. This prevents erratic operation during

fault conditions. The current limit circuit also uses a flip-flop for

latching the drive off until the following PWM cycle.

Note PWM must be toggled after POR, Thermal Limit, or

overvoltage faults to re-enable the gate drivers.

VGDH

The VGDH terminal is used to provide a gate drive signal to a

reverse battery protection MOSFET. If reverse battery

protection is desired, VIGN would be applied to the source of an

external MOSFET, and the drain of the MOSFET would then

deliver a "protected" supply voltage (VIGNP) to the three phase

array of external MOSFETs as well as the supply voltage to the

VIGNP terminal of the IC.

In a reverse polarity event (e.g., an erroneous installation of

the system battery), the VGDH signal will not be supplied to the

external protection MOSFET, and the MOSFET will remain off

and thus prevent reverse polarity from being applied to the load

and the VIGNP supply terminal of the IC.

High-Side Gate Drive Circuits

Outputs GDH1, GDH2, and GDH3 provide the elevated drive

voltage to the high-side external MOSFETs (HS1, HS2, and

HS3; see Figure 3, page 13). These gate drive outputs supply

the peak currents required to turn ON and hold ON the high-

side MOSFETs, as well as turn OFF the MOSFETs. These gate

drive circuits are powered from an internal charge pump, and

therefore compensate for voltage dropped across the load that

is reflected to the source-gate circuits of the high-side

MOSFETs.

Low-Side Gate Drive Circuits

Outputs GDL1, GDL2, and GDL3 provide the drive voltage to

the low-side external MOSFETs (LS1, LS2, and LS3; see

Figure 3). These gate drive outputs supply the peak currents

required to turn ON and hold ON the low-side MOSFETs, as

well as turn OFF the MOSFETs.

VDD Fuse

The VDD supply of the 33395 IC has an internal fuse, which

will blow and set all outputs of the device to OFF, if the VDD

voltage exceeds that stated in the maximum rating section of

the data sheet. When this fuse blows, the device is permanently

disabled.

ISENS Inputs

The +Isens and -Isens terminals are inputs to the internal

current sense comparator. In a typical application, these would

receive a a low-pass filtered voltage derived from a current

sense resistor placed in series with the ground return of the

three-phase output bridge. When triggered by the comparator,

the CL (current limit) bit of the internal error register is set, and

the output gate drive pairs (i.e., GDH1 and GDL1, GDH2 and

GDL2, GDH3 and GDL3), are controlled such that current will

cease flowing through the load (refer to Table 1, Truth Table,

page 12).

Overtemperature and Overvoltage Shutdown

Circuits

Internal monitoring is provided for both over temperature

conditions and over voltage conditions. When any of these

conditions presents itself to the IC, the corresponding internally

set bits of the error register are set, and the output gate drive

pairs (i.e., GDH1 and GDL1, GDH2 and GDL2, GDH3 and

GDL3), are controlled such that current will cease flowing

through the load (refer to Table 1).

LSE and HSE Input Circuits

The low-side enable input terminals (LSE1, LSE2, LSE3)

and high-side enable input terminals (HSE1, HSE2, HSE3) form

the input pairs (HSE1 and LSE1, HSE2 and LSE2, HSE3 and

LSE3) which set the logic states of the output gate drive pairs

(i.e., GDH1 and GDL1, GDH2 and GDL2, GDH3 and GDL3) in

accordance with the logic set forth in the Truth Table (page 12).

Typically these inputs are supplied from an MCU or DSP to

provide the phasing of the currents applied to a brushless dc

motor's stator coils via the output MOSFET pairs.

PWM Input

The pulse width modulation input provides a single input

terminal to accomplish PWM modulation of the output pairs in

accordance with the states of the Mode 0 and Mode 1 inputs as

set forth in the Truth Table (page 12).

Mode Selection Inputs

The mode selection inputs (Mode 0 and Mode 1) determine

the PWM implementation of the output pairs in accordance with

the logic set forth in the Truth Table (page 12). PWM'ing can

thus be set to occur either on the high-side MOSFETs or the

low-side MOSFETs, or can be set to occur on both the high-side

and low-side MOSFETs as "complementary chopping".

Test Terminal

This terminal should be grounded or left floating (i.e., do not

connect it to the printed circuit board). It is used by the

automated test equipment to verify proper operation of the

internal overtemperature shut down circuitry. This terminal is

susceptible to latch-up and therefore may cause erroneous

operation or device failure if connected to external circuitry.

MOTOROLA ANALOG INTEGRATED CIFRCoUrITMDoErVeICEInDfAoTrAmation On This Product,

Go to: www.freescale.com

33395

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