PCD5003AH データシートの表示（PDF） - Philips Electronics
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PCD5003AH Datasheet PDF : 44 Pages
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Philips Semiconductors
Enhanced Pager Decoder for POCSAG
Product specification
PCD5003A
7.16 Sync word indication
The sync word recognized by the PCD5003A is shown in
the call header (bits S3 to S1). The decimal value
represents the identifier number in the EEPROM of the
UPSW in question. A value of 7 indicates the standard
POCSAG sync word.
7.17 Error type indication
Table 10 shows how the different types of detected errors
are encoded in the call data output format.
A message code-word containing more than a single bit
error (bit E3 = 1) may appear as an address code-word
(bit M1 = 0) after error correction. In this event the
code-word is processed as message data and does not
cause call termination.
7.18 Data transfer
Data transfer is initiated either during sync word periods or
as soon as the receiver is disabled after call termination.
If the SRAM buffer is full, data transfer is initiated
immediately during the next code-word.
When the PCD5003A is ready to transfer received call
data an external interrupt will be generated via output INT.
Any message data can be read by accessing the RAM
output register via the I2C-bus interface. Bytes will be
output starting from the position indicated by the RAM read
pointer.
handbook, full pagewidth
1999 Jan 08
OFF to ON status
no preamble or
sync word
(3 batches)
switch-on
sync word
preamble
no preamble or
sync word
(1 batch)
preamble receive
sync word
data receive
sync word
no sync word
sync word
sync word
data fail
preamble
no preamble or
sync word
(1 batch)
fade recovery
preamble
no preamble or
sync word
(15 batches)
carrier off
preamble
MLC247
Fig.4 ACCESS® synchronization algorithm.
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