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TFRA08C13 データシートの表示(PDF) - Agere -> LSI Corporation

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TFRA08C13
Agere
Agere -> LSI Corporation Agere
TFRA08C13 Datasheet PDF : 188 Pages
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TFRA08C13 OCTAL T1/E1 Framer
Preliminary Data Sheet
October 2000
LIU-Framer Interface (continued)
Figure 6 shows the timing requirements for the transmit and receive framer interfaces in the LIU-bypass mode.
PLLCK
TLCK
TND, TPD
RLCK
t1
t2r-f
t2f-r
t3
t4
t5
t6
t7
t1-DS1
t1-CEPT
BIT 0 OF FRM_PR45
IS THE HFLF BIT
HFLF = 0
648 ns
488 ns
HFLF = 1
162 ns
122 ns
t2r-f: t2f-r: PLLCK TO TLCK DELAY = 50 ns
t3-DS1 = 648 ns
t3-CEPT = 488 ns
t4 = TLCK TO VALID TPD, TND = 30 ns
t5-DS1 = 648 ns
t5-CEPT = 488 ns
t6 = RPD, RND SETUP TO RISING RLCK = 40 ns
t7 = RPD, RND HOLD FROM RISING RLCK = 40 ns
RND, RPD
t8
RFRMCK
t8r-f: t8f-r: RLCK TO RFRMCK DELAY = 50 ns
5-4558(F).dr.1
Figure 6. Transmit Framer TLCK to TND, TPD and Receive Framer RND, RPD to RLCK Timing
30
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