UPD17717 データシートの表示（PDF） - NEC => Renesas Technology

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UPD17717

4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

NEC => Renesas Technology 

Contents

µPD17717, 17718, 17719

1. PIN FUNCTIONS .............................................................................................................................. 11

1.1 Pin Function List .................................................................................................................. 11

1.2 Equivalent Circuits of Pins ................................................................................................. 16

1.3 Connections of Unused Pins .............................................................................................. 21

1.4 Cautions on Using CE, INT0 through INT4, and RESET Pins .......................................... 23

1.5 Cautions on Using TEST Pin .............................................................................................. 23

2. PROGRAM MEMORY (ROM) .......................................................................................................... 24

2.1 Outline of Program Memory ............................................................................................... 24

2.2 Program Memory ................................................................................................................. 25

2.3 Program Counter ................................................................................................................. 26

2.4 Flow of Program .................................................................................................................. 26

2.5 Cautions on Using Program Memory ................................................................................ 29

3. ADDRESS STACK (ASK) ................................................................................................................ 30

3.1 Outline of Address Stack .................................................................................................... 30

3.2 Address Stack Register (ASR) ........................................................................................... 30

3.3 Stack Pointer (SP) ................................................................................................................ 32

3.4 Operation of Address Stack ............................................................................................... 33

3.5 Cautions on Using Address Stack ..................................................................................... 34

4. DATA MEMORY (RAM) ................................................................................................................... 35

4.1 Outline of Data Memory ...................................................................................................... 35

4.2 Configuration and Function of Data Memory .................................................................... 37

4.3 Data Memory Addressing ................................................................................................... 40

4.4 Cautions on Using Data Memory ....................................................................................... 41

5. SYSTEM REGISTERS (SYSREG) ................................................................................................... 42

5.1 Outline of System Registers ............................................................................................... 42

5.2 System Register List ........................................................................................................... 43

5.3 Address Register (AR) ........................................................................................................ 44

5.4 Window Register (WR) ........................................................................................................ 46

5.5 Bank Register (BANK) ......................................................................................................... 47

5.6 Index Register (IX) and Data Memory Row Address Pointer

(MP: memory pointer) ......................................................................................................... 48

5.7 General Register Pointer (RP) ............................................................................................ 50

5.8 Program Status Word (PSWORD) ...................................................................................... 52

6. GENERAL REGISTER (GR) ............................................................................................................ 54

6.1 Outline of General Register ................................................................................................ 54

6.2 General Register .................................................................................................................. 54

6.3 Generating Address of General Register by Each Instruction ........................................ 55

6.4 Cautions on Using General Register ................................................................................. 55

7

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