X1228 データシートの表示（PDF） - Intersil

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X1228

4K (512 x 8), 2-Wire™ RTC

Intersil 

X1228

LOW VOLTAGE RESET OPERATION

When a power failure occurs, and the voltage to the

part drops below a fixed vTRIP voltage, a reset pulse is

issued to the host microcontroller. The circuitry moni-

tors the VCC line with a voltage comparator which

senses a preset threshold voltage. Power-up and

power-down waveforms are shown in Figure 4. The

Low Voltage Reset circuit is to be designed so the

RESET signal is valid down to 1.0V.

When the low voltage reset signal is active, the operation

of any in progress nonvolatile write cycle is unaffected,

allowing a nonvolatile write to continue as long as possi-

ble (down to the power-on reset voltage). The low volt-

age reset signal, when active, terminates in progress

communications to the device and prevents new com-

mands, to reduce the likelihood of data corruption.

Figure 3. Watchdog Restart/Time Out

tRSP

tRSP<tWDO

tRSP>tWDO

tRST

tRSP>tWDO

tRST

SCL

SDA

RESET

Start

Stop Start

Note: All inputs are ignored during the active reset period (tRST).

Figure 4. Power-on Reset and Low Voltage Reset

VTRIP

VCC

tPURST

tR

RESET

tRPD

tPURST

tF

VRVALID

VCC THRESHOLD RESET PROCEDURE

[OPTIONAL]

The X1228 is shipped with a standard VCC threshold

(VTRIP) voltage. This value will not change over normal

operating and storage conditions. However, in applica-

tions where the standard VTRIP is not exactly right, or if

higher precision is needed in the VTRIP value, the

X1228 threshold may be adjusted. The procedure is

described below, and uses the application of a nonvol-

atile write control signal.

Setting the VTRIP Voltage

It is necessary to reset the trip point before setting the

new value.

To set the new VTRIP voltage, apply the desired VTRIP

threshold voltage to the VCC pin and tie the RESET pin

to the programming voltage VP. Then write data 00h to

address 01h. The stop bit following a valid write opera-

tion initiates the VTRIP programming sequence. Bring

RESET to VCC to complete the operation. Note: this

operation may take up to 10 milliseconds to complete

and also writes 00h to address 01h of the EEPROM

array.

16

FN8100.4

May 18, 2006

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