FM4005 データシートの表示（PDF） - Ramtron International Corporation
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FM4005 Datasheet PDF : 23 Pages
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for a read operation. This involves using the first two
bytes of a write operation to set the internal address
followed by subsequent read operations.
To perform a selective read, the bus master sends out
the slave address with the LSB set to 0. This specifies
a write operation. According to the write protocol,
the bus master then sends the address byte that is
loaded into the internal address latch. After the
FM4005
FM4005 acknowledges the address, the bus master
issues a Start condition. This simultaneously aborts
the write operation and allows the read command to
be issued with the slave address LSB set to a 1. The
operation is now a read from the current address.
Read operations are illustrated below.
By Master
Start
Address
No
Acknowledge
S
Slave Address 1 A
Data Byte
1P
By FM4005
Acknowledge Data
Stop
Figure 12. Current Address Register Read
By Master
Start
Address
S
Slave Address 1 A
Acknowledge
No
Acknowledge
Data Byte
A
Data Byte
1P
Stop
By FM4005
Acknowledge
Data
Figure 13. Multiple Register Read
Start
By Master
Address
Start
Address
S Slave Address 0 A 0 0 0 Address
AS
Slave Address 1 A
No
Acknowledge
Stop
Data Byte
1P
By FM4005
Acknowledge
Data
Figure 14. Single Selective Read
* Although not required, it is recommended that A5-A7 in the Address byte are zeros in
order to preserve compatibility with future devices.
Rev. 2.3
Oct. 2006
Page 17 of 23
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