MT46V16M16FG データシートの表示（PDF） - Micron Technology
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MT46V16M16FG Datasheet PDF : 80 Pages
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Commands
Table 6 and Table 7 provide a quick reference of
available commands, followed by a description of each
command. Two additional truth tables, Table 9 on
256Mb: x4, x8, x16
DDR SDRAM
page 42, and Table 10 on page 44, appear following the
Operation section, provide current state/next state
information.
Table 6: Truth Table – Commands
Note 1 applies to all commands
NAME (FUNCTION)
DESELECT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LOAD MODE REGISTER
CS# RAS# CAS# WE#
ADDR NOTES
H
X
X
X
X
9
L
H
H
H
X
9
L
L
H
H
Bank/Row
3
L
H
L
H
Bank/Col
4
L
H
L
L
Bank/Col
4
L
H
H
L
X
8
L
L
H
L
Code
5
L
L
L
H
X
6, 7
L
L
L
L
Op-Code
2
NOTE:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. BA0–BA1 select either the mode register or the extended mode register (BA0 = 0, BA1 = 0 select the mode register;
BA0 = 1, BA1 = 0 select extended mode register; other combinations of BA0–BA1 are reserved). A0-A12 provide the op-
code to be written to the selected mode register.
3. BA0–BA1 provide bank address and A0–A12 provide row address.
4. BA0–BA1 provide bank address; A0–Ai provide column address, (where i = 8 for x16, i = 9 for x8, and i = 9,11 for x4) A10
HIGH enables the auto precharge feature (nonpersistent); and A10 LOW disables the auto precharge feature.
5. A10 LOW: BA0–BA1 determine which bank is precharged.
A10 HIGH: all banks are precharged and BA0–BA1 are “Don’t Care.”
6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; within the self refresh mode, all inputs and I/Os are “Don’t Care”
except for CKE.
8. Applies only to READ bursts with auto precharge disabled; this command is undefined (and should not be used) for READ
bursts with auto precharge enabled and for WRITE bursts.
9. DESELECT and NOP are functionally interchangeable.
Table 7: Truth Table – DM Operation
Note 1 applies to all commands
NAME (FUNCTION)
DM
Write Enable
L
Write Inhibit
H
DQ
Valid
X
NOTE:
1. Used to mask write data; provided coincident with the corresponding data.
09005aef8076894f
256MBDDRx4x8x16_2.fm - Rev. F 6/03 EN
16
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.
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