ZL30415 データシートの表示（PDF） - Zarlink Semiconductor Inc

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ZL30415

SONET/SDH Clock Multiplier PLL

Zarlink Semiconductor Inc 

ZL30415

Data Sheet

3.0 ZL30415 Performance

The following are some of the ZL30415 performance indicators that complement results listed in the Characteristics

section of this data sheet.

3.1 Input Jitter Tolerance

Jitter tolerance is a measure of the PLL’s ability to operate properly (i.e., remain in lock and/or regain lock in the

presence of large jitter magnitudes at various jitter frequencies) in the presence of jitter applied to its input

reference. The input jitter tolerance of the ZL30415 is shown in Figure 4. On this graph, the single line at the top

represents the input jitter tolerance and the three overlapping lines below represent the specification for minimum

input jitter tolerance for OC-192, OC-48 and OC-12 network interfaces. The jitter tolerance is expressed in

picoseconds (pk-pk) to accommodate requirements for interfaces operating at different rates.

Figure 4 - Input Jitter Tolerance

3.2 Jitter Transfer Characteristic

Jitter Transfer Characteristic represents a ratio of the jitter at the output of a PLL to the jitter applied to the input of a

PLL. This ratio is expressed in dB and it characterizes the PLL’s ability to attenuate (filter) jitter. The ZL30415 jitter

transfer characteristic complies with the maximum 0.1 dB jitter gain specified in Telcordia’s GR-253-CORE.

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Zarlink Semiconductor Inc.

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