M29W008AB データシートの表示（PDF） - STMicroelectronics
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M29W008AB Datasheet PDF : 30 Pages
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M29W008AT, M29W008AB
Table 19. Write AC Characteristics, E Controlled
(TA = 0 to 70°C, –20 to 85°C or –40 to 85°C)
Symbol
Alt
Parameter
tAVAV
tWC Address Valid to Next Address Valid
tAVEL
tAS Address Valid to Chip Enable Low
tDVEH
tDS Input Valid to Chip Enable High
tEHDX
tDH Chip Enable High to Input Transition
tEHEL
tCPH Chip Enable High to Chip Enable Low
tEHGL
tOEH Chip Enable High to Output Enable Low
tEHRL (1)
tBUSY Program Erase Valid to RB Delay
tEHWH
tWH Chip Enable High to Write Enable High
tELAX
tAH Chip Enable Low to Address Transition
tELEH
tCP Chip Enable Low to Chip Enable High
tGHEL
Output Enable High Chip Enable Low
tPHPHH (1, 2) tVIDR RP Rise TIme to VID
tPHWL (1)
tRSP RP High to Write Enable Low
tPLPX
tRP RP Pulse Width
tVCHWL
tVCS VCC High to Write Enable Low
tWLEL
tWS Write Enable Low to Chip Enable Low
Note: 1. Sampled only, not 100% tested.
2. This timing is for Temporary Block Unprotection operation.
M29W008AT / M29W008AB
80
VCC = 3.0V to 3.6V
CL = 30pF
90
VCC = 3.0V to 3.6V
CL = 30pF
Unit
Min
Max
Min
Max
80
90
ns
0
0
ns
35
45
ns
0
0
ns
30
30
ns
0
0
ns
90
90
ns
0
0
ns
45
45
ns
35
35
ns
0
0
ns
500
500
ns
4
4
µs
500
500
ns
50
50
µs
0
0
ns
POWER SUPPLY
Power Up
The memory Command Interface is reset on pow-
er up to Read Array. The device does not accept
commands on the first rising edge of W, if both W
and E are at VIL with G at VIH during power-up.
Any write cycle initiation is blocked when VCC is
below VLKO.
Supply Rails
Normal precautions must be taken for supply volt-
age decoupling; each device in a system should
have the VCC rail decoupled with a 0.1µF capacitor
close to the VCC and VSS pins. The PCB trace
widths should be sufficient to carry the VCC pro-
gram and erase currents required.
19/30
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