LNK6663E(2014) データシートの表示（PDF） - Power Integrations, Inc
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LNK6663E
(Rev.:2014)
(Rev.:2014)
Power Integrations, Inc
LNK6663E Datasheet PDF : 24 Pages
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LinkSwitch-HP
Layout Considerations for eDIP-12B package
Quick Design Checklist
The schematic extract in Figure 13 is an example of LinkSwitch-HP All LinkSwitch-HP designs should be verified on the bench
used in a dual output LCD monitor supply using eDIP-12B
particularly for specified worst-case stress conditions. The
package. In this design the exposed metal tab on the topside
of package is left open (no heat sink). The SOURCE pins of
LinkSwitch-HP provide heat sinking through connection to the
f1o.lloMwainxgimsuemt odf rtaeisntsvoalrtaegsetr–o2n5V10gCenV9lFrAyiCfyretchoamt VmDeSndd1eo1R1/08d%1eΩ0W:s
C10
470 pF
n20o0tVexceed
source copper pad of PCB. This technique is adequate for
675 V for LNK677X series6 and12600 V for LNK6X6X series.
device dissipation up to 0.85 W (1/2 square inch of copper area
required). The layout guidelines described for eSIP-7C are the
same for eDIP-12B with an added consideration about sensitive
component layout. The return referenced components C4, C8,
C16, R9, R7 must be placed directly under the LinkSwBRi1tch-HP
package as shown in Figure 14. This requires that thD6eF000s6VeM
particular components be SMD type as this allows an ideal
This gives a 50 V margin for design variations.D3
2.
Un3Rdk1Ωer
below
a10lRl02cΩon1d0R0i3tΩions,
the
maximum
Drain
30BQ100PBF
cRu1r2rent should
th1e% spe1c%ified absolute maximum rat1i1n0%gΩs.47C015pF
be
3. Thermal check – At rated maximum outpu1t/8pWow20e0rV, minimumFerritLe2Bead
C11
220 µ
35 V
itnhpeP6u1KmVt3ER01va13Vox0Alitmaguem61a30Can03nlldVFowmeadxitmemumpearma7,8tburieenits
(3.5 × 4.45
temperature, verify that
not excDe4eded for any C13
mm)
B340LB-13-F
component in the design. Of particular importance is
820 µF
6.3 V
noise-immune layout.
Output Power Table Assumptions
L1
10 mH
C2
• 12 V output.
• Schottky rectification.
C1
100 nF
47 µF
450 V
• 82% efficiency.
310 VAC
• VOR = 135 V.
• KP = 0.4 for 85-265 VAC input and KP = 02F.16A for 195-R52TΩ61 5 tVO AC
input.
• VMIN = 100 V for 85-265 VAC input and VMIN = 2590V0A- C2V65for
195-265 VAC input.
J1-3
J1-1
• 0.85 W device dissipation for open frame designs with PCB
heat sink.
checking the 2tR0e4Ωmperature rise9,o10f the major power conversion
components s1%uch as transform3 er, outputDd2 iodes, input
C14
820 µ
bstraidtegde,cpornimdiatirDoyLnD4c19s3la7ambopvcei,rcLuinitkaSnwditLcihn-kHSBPwAV7t2it-a1FcWbhS--tHe22m2CP56µ.VpF eUrnadtuerre6.t9Rh85ekΩ
6.3 V
should not exceed 110 °5C. 1
1%
1/8 W
T1
EF25
R8
46.4 kΩ
1%
1/16 W
D
LinkSwitch-HP
U1
LNK6774V
S
R6
C4*
23.2 kΩ
1%
1/16 W
BP
CONTROL
FB
PD CP
R7
100 kΩ
1%
1/16 W
C7
100 nF
25 V
C16
10 pF
50 V
C8
100 pF
50 V
R9
10.5 kΩ
1%
1/16 W
C5
4.7 µF
10 V
PI-6860-120312
*Optional
PI-6860-120312
Figure 13. 17 W LCD Monitor Supply (+18 V, +5 V).
Figure 14. Layout for LCD Monitor Supply Using eDIP-12B Package.
www.powerint.com
11
Rev. C 03/14
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