IDT49C460 データシートの表示（PDF） - Integrated Device Technology
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IDT49C460 Datasheet PDF : 32 Pages
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IDT49C460/A/B/C/D/E
32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Bit
0–7
8
9
10
11
12
13–31
32
33
34
35
36
37
38
39
40
41
42
43
44
45–63
Internal Function
DON'T CARE
CODE ID0 LOWER 32-BIT
CODE ID1 LOWER 32-BIT
DIAG MODE0 LOWER 32-BIT
DIAG MODE1 LOWER 32-BIT
CORRECT LOWER 32-BIT
DON'T CARE
CB0 DIAGNOSTIC
CB1 DIAGNOSTIC
CB2 DIAGNOSTIC
CB3 DIAGNOSTIC
CB4 DIAGNOSTIC
CB5 DIAGNOSTIC
CB6 DIAGNOSTIC
CB7 DIAGNOSTIC
CODE ID0 UPPER 32-BIT
CODE ID1 UPPER 32-BIT
DIAG MODE0 UPPER 32-BIT
DIAG MODE1 UPPER 32-BIT
CORRECT UPPER 32-BIT
DON'T CARE
2584 tbl 10
Table 8B. 64-Bit Diagnostic Latch–Coding Format (Diagnostic and Correct Mode)
Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F
Syndrome
Bits
S7 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
S6 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
S5 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
S4 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Hex S3 S2 S1 S0
00 00 0
* C4 C5 T C6 T T 62 C7 T T 46 T M M T
10 00 1
C0 T T 14 T M M T T M M T M T T 30
20 01 0
C1 T T M T 34 56 T T 50 40 T M T T M
30 01 1
T 18 8 T M T T M M T T M T 2 24 T
40 10 0
C2 T T 15 T 35 57 T T 51 41 T M T T 31
50 10 1
T 19 9 T M T T 63 M T T 47 T 3 25 T
60 11 0
T 20 10 T M T T M M T T M T 4 26 T
70 11 1
M T T M T 36 58 T T 52 42 T M T T M
81 00 0
C3 T T M T 37 59 T T 53 43 T M T T M
91 00 1
T 21 11 T M T T M M T T M T 5 27 T
A1 01 0
T 22 12 T 33 T T M 49 T T M T 6 28 T
B1 01 1
17 T T M T 38 60 T T 54 44 T 1 T T M
C1 10 0
T 23 13 T M T T M M T T M T 7 29 T
D1 10 1
M T T M T 39 61 T T 55 45 T M T T M
E1 11 0
16 T T M T M M T T M M T 0 T T M
F1 11 1
T M M T 32 T T M 48 T T M T M M T
NOTES:
* = No errors detected
Number = The number of the single bit-in-error
T = Two errors detected
M = Three or more errors detected
2584 tbl 11
Table 9. Syndrome Decode to Bit–In–Error (64–Bit Configuration)
11.6
11
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