Memories and memory interfaces
3. Crystal startup time is defined as the time between the oscillator being enabled and the OSCINIT bit in the MCG_S register
being set.
6.4 Memories and memory interfaces
6.4.1 Flash (FTFL) electrical specifications
This section describes the electrical characteristics of the FTFL module.
6.4.1.1 Flash timing specifications — program and erase
The following specifications represent the amount of time the internal charge pumps are
active and do not include command overhead.
Table 16. NVM program/erase timing specifications
Symbol Description
thvpgm4 Longword Program high-voltage time
thversscr Sector Erase high-voltage time
thversblk32k Erase Block high-voltage time for 32 KB
thversblk128k Erase Block high-voltage time for 128 KB
Min.
—
—
—
—
Typ.
20
20
20
80
Max.
TBD
100
100
400
Unit
Notes
μs
ms
1
ms
1
ms
1
1. Maximum time based on expectations at cycling end-of-life.
6.4.1.2 Flash timing specifications — commands
Table 17. Flash command timing specifications
Symbol Description
Read 1s Block execution time
trd1blk32k
trd1blk128k
• 32 KB data flash
• 128 KB data flash
Min.
—
—
Typ.
—
—
Max.
0.4
1.4
Unit
Notes
ms
ms
trd1sec1k Read 1s Section execution time (flash sector)
—
—
40
μs
1
tpgmchk Program Check execution time
—
—
35
μs
1
trdrsrc Read Resource execution time
—
—
35
μs
1
tpgm4 Program Longword execution time
—
50
TBD
μs
Erase Flash Block execution time
2
tersblk32k
tersblk128k
• 32 KB data flash
• 128 KB data flash
—
20
100
ms
—
80
400
ms
tersscr Erase Flash Sector execution time
—
20
100
ms
2
Table continues on the next page...
MCF51JF128 Advance Information Data Sheet, Rev. 2, 05/2011.
26
Preliminary
Freescale Semiconductor, Inc.